LTC4268IDKD-1#PBF【PDF 38/46 页】IC PD HIGH POWER W/CNTRL 32-DFN

LTC4268-1

38

42681fc

Power MOSFET Selection

The power MOSFETs are selected primarily on the criteria of

on resistance R

DS(ON)

, input capacitance, drain-to-source

breakdown voltage (BV

DSS

), maximum gate voltage (V

GS

)

and maximum drain current (ID

(MAX)

).

For the primary-side power MOSFET, the peak current is:

I

PK(PRI)

=

P

IN

V

IN(MIN)

DC

MAX

1+

X

MIN

2

?/DIV>

where X

MIN

is peak-to-peak current ratio as defined

earlier. For each secondary-side power MOSFET, the peak

current is:

I

PK(SEC)

=

I

OUT

1DC

MAX

1+

X

MIN

2

?/DIV>

Select a primary-side power MOSFET with a BV

DSS

greater

than:

BV

DSS

eI

PK

L

LKG

C

P

+ V

IN(MAX)

+

V

OUT(MAX)

N

SP

where N

SP

reflects the turns ratio of that secondary-to

primary winding. L

LKG

is the primary-side leakage induc-

tance and C

P

is the primary-side capacitance (mostly from

the drain capacitance (C

OSS

) of the primary-side power

MOSFET). A snubber may be added to reduce the leakage

inductance as discussed.

For each secondary-side power MOSFET, the BV

DSS

should

be greater than:

BV

DSS

e V

OUT

+ V

IN(MAX)

" N

SP

applicaTions inForMaTion

Choose the primary side MOSFET R

DS(ON)

at the nominal

gate drive voltage (7.5V). The secondary side MOSFET

gate drive voltage depends on the gate drive method.

Primary side power MOSFET RMS current is given by:

I

RMS(PRI)

=

P

IN

V

IN(MIN)

DC

MAX

For each secondary-side power MOSFET RMS current is

given by:

I

RMS(SEC)

=

I

OUT

1DC

MAX

Calculate MOSFET power dissipation next. Because the

primary-side power MOSFET operates at high V

DS

, a

transition power loss term is included for accuracy. C

MILLER

is the most critical parameter in determining the transition

loss, but is not directly specified on the data sheets.

C

MILLER

is calculated from the gate charge curve included

on most MOSFET data sheets (Figure 17).

The flat portion of the curve is the result of the Miller

(gate-to-drain) capacitance as the drain voltage drops.

The Miller capacitance is computed as:

C

MILLER

=

Q

B

Q

A

V

DS

The curve is done for a given V

DS

. The Miller capacitance

for different V

DS

voltages are estimated by multiplying the

computed C

MILLER

by the ratio of the application V

DS

to

the curve specified V

DS

.

Q

A

V

GS

a

b

42681 F18

Q

B

MILLER EFFECT

GATE CHARGE (Q

G

)

Figure 18. Gate Charge Curve

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